1. Field of the Invention
The present invention relates to a display device having a thin film transistor, and more particularly, to a method of applying an OFF-state offset to a P-type polycrystalline thin film transistor for a liquid crystal display device.
2. Discussion of the Related Art
Display systems that display information have been the subject of research. Cathode-ray tubes (CRTs), for example have generally been used for such display systems. However, use of flat panel displays (FPDs) is becoming increasingly common because of their small depth, low weight and low power consumption. Thin-film transistor-liquid crystal displays (TFT-LCDs) are being developed that have high resolution, small depth and high color reproducibility.
When a pixel is turned on by a switching element, the pixel transmits light from a backlight unit. Amorphous silicon (a-Si:H) thin film transistors (TFTs) that include a semiconductor layer of amorphous silicon are widely used as switching elements because the amorphous silicon thin film transistor can be formed on a large-sized insulating substrate such as a glass substrate under a low temperature. Even though TFT-LCDs using amorphous silicon TFTs have an advantage over CRTs of low power consumption, the price of TFT-LCDs is higher than that of CRTs because TFT-LCDs require an expensive driving circuit.
FIG. 1 is a schematic plan view of an amorphous silicon thin film transistor liquid crystal display device according to the related art. In FIG. 1, a substrate 10 includes a display region “D.” A gate driving integrated circuit (IC) 20 and a data driving IC 30 are formed between the display region “D” and a printed circuit board (PCB) 40. Generally, the gate and data driving ICs 20 and 30, which are referred to as a large scale integration (LSI), are fabricated using single crystalline silicon and connected to the substrate using a tape automated bonding (TAB) method. However, as the resolution of the liquid crystal display (LCD) device increases, more leads are necessary to connect the substrate and the driving LSI. For example, in a super extended graphic array (SXGA) display having 1280×1024×3 pixels, at least 1280×3+1024 leads are required for connection. The process for fabricating large numbers of leads is complex, thereby reducing reliability and production yield. Moreover, the price of LCD devices increases due to the expensive driving LSI. To solve these problems, LCD devices using a polycrystalline silicon thin film transistor are suggested.
FIG. 2 is a schematic plan view of a polycrystalline silicon thin film transistor liquid crystal display device according to the related art. In FIG. 2, a substrate 10 includes a display region “D.” Contrary to LCD devices using an amorphous silicon thin film transistor, a gate driving circuit 22 and a data driving circuit 32 of the LCD device of FIG. 2 are formed directly on the substrate 10 using polycrystalline silicon as a switching element of each pixel (not shown). Accordingly, an additional process of connecting the substrate and a driving LSI is not necessary.
The polycrystalline silicon thin film transistor liquid crystal display device includes first and second substrates facing and spaced apart from each other, and a liquid crystal layer interposed therebetween. The first substrate having a thin film transistor (TFT) “T” and array lines, and the second substrate having a black matrix and a color filter layer are fabricated through various process steps. Among the various process steps, a process for stabilizing the TFT “T” may be performed for the first substrate having the TFT “T” or for the attached first and second substrates, i.e. for a cell having the TFT “T.” When a polycrystalline silicon (p-Si) TFT-LCD device is driven for a long period of time under room temperature, carriers generated at a P-N (positive-negative) junction of the p-Si TFT may produce an OFF-current (IOFF) and the OFF-current (IOFF) may leave residual images on the liquid crystal panel which can degrade the LCD device. Accordingly, a stabilizing process is performed in which an OFF-state offset is applied to the P-type TFT to prevent the residual images. To apply an OFF-state offset means to apply a voltage opposite to or different from a normal voltage. Through this stabilizing process, the OFF-current may be reduced and mobility of the TFT may be improved.
One method of applying an OFF-state offset is disclosed in Korean Patent Application No. 10-2002-51513. Korean Patent Application No. 10-2002-51513 discloses a method of applying a pulse of alternating current (AC) to one of a gate terminal, a source terminal and a drain terminal of a pixel TFT and a liquid crystal panel using the same. The OFF-state offset is applied to the TFT regardless of a liquid crystal capacitor and a storage capacitor. In addition, the OFF-state offset is applied to a plurality of TFTs in the liquid crystal panel at one time and characteristics of the plurality of TFTs including an OFF current are improved.
FIGS. 3A and 3B are an equivalent circuit diagram and a timing chart, respectively, illustrating a method of applying signals to a P-type thin film transistor according to the related art. In FIGS. 3A and 3B, a ground voltage is applied to a source electrode of a P-type TFT “SW” through a data line (VD=0V), and a positive voltage is applied to a gate electrode of the P-type TFT “SW” through a gate line (VG>0V). A pulse is applied to a storage electrode through a storage line (VST=PULSE). Accordingly, an OFF-state offset is applied to both the source and drain electrodes of the P-type TFT “SW.”
In order to apply the ground voltage, the positive voltage and the pulse, pads are formed on a substrate having the TFT. FIG. 4 is a schematic view showing pads for applying signals according to the related art. In FIG. 4, a display region 60 is defined at a central portion of a substrate 10. Even though not shown in FIG. 4, a plurality of P-type TFTs are formed in the display region 60. Pads 50 are formed at an edge portion of the substrate 10. Signals for OFF-state offset are applied to the plurality of P-type TFTs through the pads 50 from an external circuit.
However, because an additional process of forming the pads 50 is required, the total steps for forming an LCD device increase. In addition, static electricity of the pads may cause a deterioration in the LCD device.